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Freescale Semiconductor, Inc.
Advance Information
AN1812/D Rev. 1, 12/2001 Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410
CPD Applications
Freescale Semiconductor, Inc...
This document describes how to design a platform with a common footprint for the MPC750, MPC755, MPC7400, and MPC7410; that is, it is intended to help design a single board compatible with all of these devices. Although this document contains relevant information, it is not intended to be a complete migration guide for moving from G3- to G4-class systems. As a general note, refer to the appropriate hardware specifications and user's manual for the specific device under consideration. For this document, the following system definition is assumed for the MPC750, MPC755, MPC7400 and MPC7410: * * * 64-bit data bus mode No data retry Bus operates in 60x mode
Note that all the CPUs can run in 60x bus, and the MPC7400 and MPC7410 have the ability to run in an enhanced mode MPX.
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Main Pin Difference
1.1
Main Pin Difference
This section includes Table 1 which lists the main differences between the MPC750, MPC755, MPC7400 and MPC7410 and the configuration pins. The MPX bus column provides information for designers to take advantage of the MPX bus mode for future board revisions.
Table 1. Main Pin Difference and Configuration Pins
Pin # B3 B4 Type I/O I/O Output Output Output MPC750 No Connect No Connect No Connect No Connect No Connect MPC755 No Connect No Connect No Connect No Connect No Connect MPC7400/ MPC7410 60x Bus SHD[0] SHD[1] No Function No Function L2A17 MPC7400/ MPC7410 MPX Bus SHD[0] SHD[1] HIT DRDY L2A17 Connect to L2 SRAM. A pull-up to L2VODD should be used if MPC750/MPC755 1Mbyte compatibility is required when using 2Mbytes of SRAM. Reserved for future expansion See hardware specification document. Should put in a pull up/down pair for each to allow any configuration. Comment Pull-up (in multi CPU system, connect together) 1 Pull-up (in multi CPU system, connect together)1 Pull-up to OVDD1
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B5 K9 K19
W19 A4 A5 A6 A7 F9 F7 F8 K11 K13 L7 C2 C3 K5 D1 H6
Output Input Input Input Input Input Input Input Input
No Connect PLL_CFG[0] PLL_CFG[1] PLL_CFG[2] PLL_CFG[3] LSSD_MODE L2_TSTCLK L1_TSTCLK No Connect VOLDET
No Connect PLL_CFG[0] PLL_CFG[1] PLL_CFG[2] PLL_CFG[3] LSSD_MODE L2_TSTCLK L1_TSTCLK No Connect VOLDET ABB CI WT DBB DBWO DRTRY
L2A18 PLL_CFG[0] PLL_CFG[1] PLL_CFG[2] PLL_CFG[3] LSSD_MODE L2_TSTCLK L1_TSTCLK CHK L2OVDD[13] ABB CI WT DBB DBWO No Function
L2A18 PLL_CFG[0] PLL_CFG[1] PLL_CFG[2] PLL_CFG[3] LSSD_MODE L2_TSTCLK L1_TSTCLK CHK L2OVDD[13] ABB CI WT DBB DTI[0] 2 DTI[1]2
Pull-up to OVDD
Must be connected to L2OVDD Pull-up to OVDD1
I/O or Output I/O or Output I/O or Output I/O or Output Input Input
ABB CI WT DBB DBWO DRTRY
Connect to HRESET for no Data retry mode in 60x bus.
2
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
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I/O Voltage Selection Table 1. Main Pin Difference and Configuration Pins (continued)
Pin # G1 A3 W1 A19
1 2
Type Input Input
MPC750 DBDIS TLBISYNC No Connect No Connect
MPC755 DBDIS TLBISYNC BVSEL L2VSEL
MPC7400/ MPC7410 60x Bus No Function EMODE BVSEL L2VSEL
MPC7400/ MPC7410 MPX Bus DTI[2]2 EMODE BVSEL L2VSEL
Comment Pull-up to OVDD1 Pull-up to OVDD (64-bit 60x bus) See Table 2 and Table 3 for voltages.
See the individual hardware specifications document for the recommended resistor value. DTI[0:2] should be pulled low in MPX bus mode to disable re-ordering.
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1.2
I/O Voltage Selection
This section lists the four footprint power planes and displays the section matrix for the I/O voltages. In addition, the footprint should have four power planes: * * * * Ground The CPU core voltage, [VDD] The I/O voltage for the system bus, [OVDD] The I/O voltage for the L2 SRAM interface, [L2OVDD] The I/O voltages [OVDD and L2OVDD] are selectable on all the CPUs except the MPC750, which supports 3.3V only on both of these interfaces. Table 2 and Table 3 show the selection matrix for the I/O voltages:
Table 2. I/O Voltage Selection--BVSEL
BVSEL 0 HRESET 1 HRESET Unconnected (internal pull-up) MPC750 N/A N/A N/A N/A N/A MPC755 N/A N/A OVDD (2.5V/3.3V) N/A 2.5V/3.3V MPC7400 1.8V N/A 3.3V N/A 3.3V MPC7410 (Rev E) 1.8V 2.5V 3.3V 3.3V 3.3V
MOTOROLA
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
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I/O Voltage Selection Table 3. I/O Voltage Selection--L2VSEL
L2VSEL 0 HRESET 1 HRESET Unconnected (internal pull-up) MPC750 N/A N/A N/A N/A N/A MPC755 N/A N/A L2VDD (2.5V/3.3V) N/A 2.5V/3.3V MPC7400 1.8V 2.5V 3.3V N/A 3.3V MPC7410 (Rev E) 1.8V 2.5V 2.5V N/A 2.5V
Table 4 pertains to the remaining pins, and the comments are valid for the common footprint.
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Table 4. Remaining Pins
Pin # A13 D2 H11 C1 B13 F2 C13 E5 D13 G7 F12 G3 G6 H2 E2 L3 G5 L4 G4 J4 H7 E1 G2 F3 Type I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O A[00] A[01] A[02] A[03] A[04] A[05] A[06] A[07] A[08] A[09] A[10] A[11] A[12] A[13] A[14] A[15] A[16] A[17] A[18] A[19] A[20] A[21] A[22] A[23] MPC750 A[00] A[01] A[02] A[03] A[04] A[05] A[06] A[07] A[08] A[09] A[10] A[11] A[12] A[13] A[14] A[15] A[16] A[17] A[18] A[19] A[20] A[21] A[22] A[23] MPC755 MPC7400/ MPC7410 60x or MPX Bus A[00] A[01] A[02] A[03] A[04] A[05] A[06] A[07] A[08] A[09] A[10] A[11] A[12] A[13] A[14] A[15] A[16] A[17] A[18] A[19] A[20] A[21] A[22] A[23] Comment
4
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
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I/O Voltage Selection Table 4. Remaining Pins (continued)
Pin # J7 M3 H3 J2 J6 K3 K2 Type I/O I/O I/O I/O I/O I/O I/O I/O Input I/O I/O I/O I/O I/O A[24] A[25] A[26] A[27] A[28] A[29] A[30] A[31] AACK AP[0] AP[1] AP[2] AP[3] ARTRY AVDD Input Output Output Input Output Output I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O BG BR CI CKSTP_IN CKSTP_OUT CLKOUT DH[00] DH[01] DH[02] DH[03] DH[04] DH[05] DH[06] DH[07] DH[08] DH[09] DH[10] DH[11] DH[12] MPC750 A[24] A[25] A[26] A[27] A[28] A[29] A[30] A[31] AACK AP[0] AP[1] AP[2] AP[3] ARTRY AVDD BG BR CI CKSTP_IN CKSTP_OUT CLKOUT DH[00] DH[01] DH[02] DH[03] DH[04] DH[05] DH[06] DH[07] DH[08] DH[09] DH[10] DH[11] DH[12] MPC755 MPC7400/ MPC7410 60x or MPX Bus A[24] A[25] A[26] A[27] A[28] A[29] A[30] A[31] AACK AP[0] AP[1] AP[2] AP[3] ARTRY AVDD BG BR CI CKSTP_IN CKSTP_OUT CLKOUT D[00] D[01] D[02] D[03] D[04] D[05] D[06] D[07] D[08] D[09] D[10] D[11] D[12] Pull up to OVDD1 Pull up to OVDD1 Use filter circuit 2 Pull down if no other master. Pull up to OVDD 1 Pulled up to OVDD if not used to reduce noise and power. Comment
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L2 N3 C4 C5 C6 C7 L6 A8 H1 E7 C2 B8 D7 E3 W12 W11 V11 T9 W10 U9 U10 M11 M9 P8 W7 P9 W9
MOTOROLA
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
5
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I/O Voltage Selection Table 4. Remaining Pins (continued)
Pin # R10 W6 V7 V6 U8 V9 T7 Type I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O MPC750 DH[13] DH[14] DH[15] DH[16] DH[17] DH[18] DH[19] DH[20] DH[21] DH[22] DH[23] DH[24] DH[25] DH[26] DH[27] DH[28] DH[29] DH[30] DH[31] DL[00] DL[01] DL[02] DL[03] DL[04] DL[05] DL[06] DL[07] DL[08] DL[09] DL[10] DL[11] DL[12] DL[13] DL[14] MPC755 DH[13] DH[14] DH[15] DH[16] DH[17] DH[18] DH[19] DH[20] DH[21] DH[22] DH[23] DH[24] DH[25] DH[26] DH[27] DH[28] DH[29] DH[30] DH[31] DL[00] DL[01] DL[02] DL[03] DL[04] DL[05] DL[06] DL[07] DL[08] DL[09] DL[10] DL[11] DL[12] DL[13] DL[14] MPC7400/ MPC7410 60x or MPX Bus D[13] D[14] D[15] D[16] D[17] D[18] D[19] D[20] D[21] D[22] D[23] D[24] D[25] D[26] D[27] D[28] D[29] D[30] D[31] D[32] D[33] D[34] D[35] D[36] D[37] D[38] D[39] D[40] D[41] D[42] D[43] D[44] D[45] D[46] Comment
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U7 R7 U6 W5 U5 W4 P7 V5 V4 W3 U4 R5 M6 P3 N4 N5 R3 M7 T2 N6 U2 N7 P11 V13 U12 P12 T13
6
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
MOTOROLA
Freescale Semiconductor, Inc.
I/O Voltage Selection Table 4. Remaining Pins (continued)
Pin # W13 U13 V10 W8 T11 U11 V12 Type I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O Input I/O I/O I/O I/O I/O I/O I/O I/O I/O MPC750 DL[15] DL[16] DL[17] DL[18] DL[19] DL[20] DL[21] DL[22] DL[23] DL[24] DL[25] DL[26] DL[27] DL[28] DL[29] DL[30] DL[31] DBG DP[0] DP[1] DP[2] DP[3] DP[4] DP[5] DP[6] DP[7] GBL GND[01] GND[02] GND[03] GND[04] GND[05] GND[06] GND[07] MPC755 DL[15] DL[16] DL[17] DL[18] DL[19] DL[20] DL[21] DL[22] DL[23] DL[24] DL[25] DL[26] DL[27] DL[28] DL[29] DL[30] DL[31] DBG DP[0] DP[1] DP[2] DP[3] DP[4] DP[5] DP[6] DP[7] GBL GND[01] GND[02] GND[03] GND[04] GND[05] GND[06] GND[07] MPC7400/ MPC7410 60x or MPX Bus D[47] D[48] D[49] D[50] D[51] D[52] D[53] D[54] D[55] D[56] D[57] D[58] D[59] D[60] D[61] D[62] D[63] DBG DP[0] DP[1] DP[2] DP[3] DP[4] DP[5] DP[6] DP[7] GBL GND[01] GND[02] GND[03] GND[04] GND[05] GND[06] GND[07] Pull up1 Ground for the device Pull down if no other masters Pulled up if not used to reduce noise and power. Comment
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V8 TU1 P1 V1 U1 N1 R2 V3 U3 W2 K1 L1 P2 M2 V2 M1 N2 T3 R1 B1 D10 D14 D16 D4 D6 E12 E8
MOTOROLA
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
7
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I/O Voltage Selection Table 4. Remaining Pins (continued)
Pin # F4 F6 F10 F14 F16 G9 G11 Type MPC750 GND[08] GND[09] GND[10] GND[11] GND[12] GND[13] GND[14] GND[15] GND[16] GND[17] GND[18] GND[19] GND[20] GND[21] GND[22] GND[23] GND[24] GND[25] GND[26] GND[27] GND[28] GND[29] GND[30] GND[31] GND[32] GND[33] GND[34] GND[35] GND[36] GND[37] GND[38] GND[39] GND[40] GND[41] MPC755 GND[08] GND[09] GND[10] GND[11] GND[12] GND[13] GND[14] GND[15] GND[16] GND[17] GND[18] GND[19] GND[20] GND[21] GND[22] GND[23] GND[24] GND[25] GND[26] GND[27] GND[28] GND[29] GND[30] GND[31] GND[32] GND[33] GND[34] GND[35] GND[36] GND[37] GND[38] GND[39] GND[40] GND[41] MPC7400/ MPC7410 60x or MPX Bus GND[08] GND[09] GND[10] GND[11] GND[12] GND[13] GND[14] GND[15] GND[16] GND[17] GND[18] GND[19] GND[20] GND[21] GND[22] GND[23] GND[24] GND[25] GND[26] GND[27] GND[28] GND[29] GND[30] GND[31] GND[32] GND[33] GND[34] GND[35] GND[36] GND[37] GND[38] GND[39] GND[40] GND[41] Comment
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H5 H8 H10 H12 H15 J9 J11 K4 K6 K8 K10 K12 K14 K16 L9 L11 M5 M8 M10 M12 M15 N9 N11 P4 P6 P10 P14
8
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
MOTOROLA
Freescale Semiconductor, Inc.
I/O Voltage Selection Table 4. Remaining Pins (continued)
Pin # P16 R8 R12 T4 T6 T10 T14 Type MPC750 GND[42] GND[43] GND[44] GND[45] GND[46] GND[47] GND[48] GND[49] Input Input Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output Output HRESET INT L2ADDR[0] L2ADDR[1] L2ADDR[2] L2ADDR[3] L2ADDR[4] L2ADDR[5] L2ADDR[6] L2ADDR[7] L2ADDR[8] L2ADDR[9] L2ADDR[10] L2ADDR[11] L2ADDR[12] L2ADDR[13] L2ADDR[14] L2ADDR[15] L2ADDR[16] L2AVDD Output Output Output I/O I/O I/O L2CE L2CLKOUTA L2CLKOUTB L2DATA[0] L2DATA[1] L2DATA[2] MPC755 GND[42] GND[43] GND[44] GND[45] GND[46] GND[47] GND[48] GND[49] HRESET INT L2ADDR[0] L2ADDR[1] L2ADDR[2] L2ADDR[3] L2ADDR[4] L2ADDR[5] L2ADDR[6] L2ADDR[7] L2ADDR[8] L2ADDR[9] L2ADDR[10] L2ADDR[11] L2ADDR[12] L2ADDR[13] L2ADDR[14] L2ADDR[15] L2ADDR[16] L2AVDD L2CE L2CLKOUTA L2CLKOUTB L2DATA[0] L2DATA[1] L2DATA[2] MPC7400/ MPC7410 60x or MPX Bus GND[42] GND[43] GND[44] GND[45] GND[46] GND[47] GND[48] GND[49] HRESET INT L2A[00] L2A[01] L2A[02] L2A[03] L2A[04] L2A[05] L2A[06] L2A[07] L2A[08] L2A[09] L2A[10] L2A[11] L2A[12] L2A[13] L2A[14] L2A[15] L2A[16] L2AVDD L2CE L2CLKOUTA L2CLKOUTB L2D[00] L2D[01] L2D[02] Use filter circuit2 Driven constantly from reset controller Pull up if not driven constantly Comment
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T16 B6 C11 L17 L18 L19 M19 K18 K17 K15 J19 J18 J17 J16 H18 H17 J14 J13 H19 G18 L13 P17 N15 L16 U14 R13 W14
MOTOROLA
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
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I/O Voltage Selection Table 4. Remaining Pins (continued)
Pin # W15 V15 U15 W16 V16 W17 V17 Type I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O MPC750 L2DATA[3] L2DATA[4] L2DATA[5] L2DATA[6] L2DATA[7] L2DATA[8] L2DATA[9] L2DATA[10] L2DATA[11] L2DATA[12] L2DATA[13] L2DATA[14] L2DATA[15] L2DATA[16] L2DATA[17] L2DATA[18] L2DATA[19] L2DATA[20] L2DATA[21] L2DATA[22] L2DATA[23] L2DATA[24] L2DATA[25] L2DATA[26] L2DATA[27] L2DATA[28] L2DATA[29] L2DATA[30] L2DATA[31] L2DATA[32] L2DATA[33] L2DATA[34] L2DATA[35] L2DATA[36] MPC755 L2DATA[3] L2DATA[4] L2DATA[5] L2DATA[6] L2DATA[7] L2DATA[8] L2DATA[9] L2DATA[10] L2DATA[11] L2DATA[12] L2DATA[13] L2DATA[14] L2DATA[15] L2DATA[16] L2DATA[17] L2DATA[18] L2DATA[19] L2DATA[20] L2DATA[21] L2DATA[22] L2DATA[23] L2DATA[24] L2DATA[25] L2DATA[26] L2DATA[27] L2DATA[28] L2DATA[29] L2DATA[30] L2DATA[31] L2DATA[32] L2DATA[33] L2DATA[34] L2DATA[35] L2DATA[36] MPC7400/ MPC7410 60x or MPX Bus L2D[03] L2D[04] L2D[05] L2D[06] L2D[07] L2D[08] L2D[09] L2D[10] L2D[11] L2D[12] L2D[13] L2D[14] L2D[15] L2D[16] L2D[17] L2D[18] L2D[19] L2D[20] L2D[21] L2D[22] L2D[23] L2D[24] L2D[25] L2D[26] L2D[27] L2D[28] L2D[29] L2D[30] L2D[31] L2D[32] L2D[33] L2D[34] L2D[35] L2D[36] Comment
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U17 W18 V18 U18 V19 U19 T18 T17 R19 R18 R17 R15 P19 P18 P13 N14 N13 N19 N17 M17 M13 M18 H13 G19 G16 G15 G14
10
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
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I/O Voltage Selection Table 4. Remaining Pins (continued)
Pin # G13 F19 F18 F13 E19 E18 E17 Type I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O MPC750 L2DATA[37] L2DATA[38] L2DATA[39] L2DATA[40] L2DATA[41] L2DATA[42] L2DATA[43] L2DATA[44] L2DATA[45] L2DATA[46] L2DATA[47] L2DATA[48] L2DATA[49] L2DATA[50] L2DATA[51] L2DATA[52] L2DATA[53] L2DATA[54] L2DATA[55] L2DATA[56] L2DATA[57] L2DATA[58] L2DATA[59] L2DATA[60] L2DATA[61] L2DATA[62] L2DATA[63] L2DP[0] L2DP[1] L2DP[2] L2DP[3] L2DP[4] L2DP[5] L2DP[6] MPC755 L2DATA[37] L2DATA[38] L2DATA[39] L2DATA[40] L2DATA[41] L2DATA[42] L2DATA[43] L2DATA[44] L2DATA[45] L2DATA[46] L2DATA[47] L2DATA[48] L2DATA[49] L2DATA[50] L2DATA[51] L2DATA[52] L2DATA[53] L2DATA[54] L2DATA[55] L2DATA[56] L2DATA[57] L2DATA[58] L2DATA[59] L2DATA[60] L2DATA[61] L2DATA[62] L2DATA[63] L2DP[0] L2DP[1] L2DP[2] L2DP[3] L2DP[4] L2DP[5] L2DP[6] MPC7400/ MPC7410 60x or MPX Bus L2D[37] L2D[38] L2D[39] L2D[40] L2D[41] L2D[42] L2D[43] L2D[44] L2D[45] L2D[46] L2D[47] L2D[48] L2D[49] L2D[50] L2D[51] L2D[52] L2D[53] L2D[54] L2D[55] L2D[56] L2D[57] L2D[58] L2D[59] L2D[60] L2D[61] L2D[62] L2D[63] L2DP[0] L2DP[1] L2DP[2] L2DP[3] L2DP[4] L2DP[5] L2DP[6] Comment
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E15 D19 D18 D17 C18 C17 B19 B18 B17 A18 A17 A16 B16 C16 A14 A15 C15 B14 C14 E13 V14 U16 T19 N18 H14 F17 C19
MOTOROLA
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
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I/O Voltage Selection Table 4. Remaining Pins (continued)
Pin # B15 D15 E14 E16 H16 J15 L15 Type I/O MPC750 L2DP[7] L2OVDD[01] L2OVDD[02] L2OVDD[03] L2OVDD[04] L2OVDD[05] L2OVDD[06] L2OVDD[07] L2OVDD[08] L2OVDD[09] L2OVDD[10] L2OVDD[11] L2OVDD[12] Input L2SYNC_IN MPC755 L2DP[7] L2OVDD[01] L2OVDD[02] L2OVDD[03] L2OVDD[04] L2OVDD[05] L2OVDD[06] L2OVDD[07] L2OVDD[08] L2OVDD[09] L2OVDD[10] L2OVDD[11] L2OVDD[12] L2SYNC_IN MPC7400/ MPC7410 60x or MPX Bus L2DP[7] L2OVDD[01] L2OVDD[02] L2OVDD[03] L2OVDD[04] L2OVDD[05] L2OVDD[06] L2OVDD[07] L2OVDD[08] L2OVDD[09] L2OVDD[10] L2OVDD[11] L2OVDD[12] L2SYNC_IN Connected to L2SYNC_OUT with a trace length equal to the address and data for L2 SRAMs Connected to L2SYNC_IN with a trace length equal to the address and data for L2 SRAMs Level 2 cache I/O voltage Comment
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M16 P15 R14 R16 T15 F15 L14
M14
Output
L2SYNC_OUT
L2SYNC_OUT
L2SYNC_OUT
N16 G17 B11
L2WE L2ZZ MCP
L2WE L2ZZ MCP
L2WE L2ZZ MCP
12
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
MOTOROLA
Freescale Semiconductor, Inc.
I/O Voltage Selection Table 4. Remaining Pins (continued)
Pin # D5 D8 D12 E4 E6 E9 E11 Type MPC750 OVDD[00] OVDD[01] OVDD[02] OVDD[03] OVDD[04] OVDD[05] OVDD[06] OVDD[07] OVDD[08] OVDD[09] OVDD[10] OVDD[11] OVDD[12] OVDD[13] OVDD[14] OVDD[15] OVDD[16] OVDD[17] OVDD[18] OVDD[19] Input Output Output Input Input Input Input Input I/O Input Input Output Input Input QACK QREQ RSRV SMI SRESET SYSCLK TA TBEN TBST TCK TDI TD0 TEA TMS MPC755 OVDD[00] OVDD[01] OVDD[02] OVDD[03] OVDD[04] OVDD[05] OVDD[06] OVDD[07] OVDD[08] OVDD[09] OVDD[10] OVDD[11] OVDD[12] OVDD[13] OVDD[14] OVDD[15] OVDD[16] OVDD[17] OVDD[18] OVDD[19] QACK QREQ RSRV SMI SRESET SYSCLK TA TBEN TBST TCK TDI TD0 TEA TMS MPC7400/ MPC7410 60x or MPX Bus OVDD[00] OVDD[01] OVDD[02] OVDD[03] OVDD[04] OVDD[05] OVDD[06] OVDD[07] OVDD[08] OVDD[09] OVDD[10] OVDD[11] OVDD[12] OVDD[13] OVDD[14] OVDD[15] OVDD[16] OVDD[17] OVDD[18] OVDD[19] QACK QREQ RSRV SMI SRESET SYSCLK TA TBEN TBST TCK TDI TD0 TEA TMS Pull up1 Pull up Pull up1 Pull up if not driven constantly1 Pull up1 Put to test point useful for debug. Pull up if not driven constantly1 Pull up if not driven constantly1 Pull up if unused1 Comment System bus I/O voltage.
Freescale Semiconductor, Inc...
F5 H4 J5 L5 M4 P5 R4 R6 R9 R11 T5 T8 T12 B2 J3 D3 A12 E10 H9 F1 A2 A11 B10 B7 D9 J1 C8
13
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
MOTOROLA
Freescale Semiconductor, Inc.
I/O Voltage Selection Table 4. Remaining Pins (continued)
Pin # A10 Type Input TRST MPC750 MPC755 TRST MPC7400/ MPC7410 60x or MPX Bus TRST Comment Connect to HRESET directly if JTAG or COP not used or via logic. Pull up1
K7 A9 B9 C9 C10
I/O Output Output Output I/O I/O I/O I/O I/O Output
TS TSIZ[0] TSIZ[1] TSIZ[2] TT[0] TT[1] TT[2] TT[3] TT[4] WT VDD[00] VDD[01] VDD[02] VDD[03] VDD[04] VDD[05] VDD[06] VDD[07] VDD[08] VDD[09] VDD[10] VDD[11]
TS TSIZ[0] TSIZ[1] TSIZ[2] TT[0] TT[1] TT[2] TT[3] TT[4] WT VDD[00] VDD[01] VDD[02] VDD[03] VDD[04] VDD[05] VDD[06] VDD[07] VDD[08] VDD[09] VDD[10] VDD[11]
TS TSIZ[0] TSIZ[1] TSIZ[2] TT[0] TT[1] TT[2] TT[3] TT[4] WT VDD[00] VDD[01] VDD[02] VDD[03] VDD[04] VDD[05] VDD[06] VDD[07] VDD[08] VDD[09] VDD[10] VDD[11]
Pull up1
Freescale Semiconductor, Inc...
D11 B12 C12 F11 C3 G8 G10 G12 J8 J10 J12 L8 L10 L12 N8 N10 N12
1 2
CPU core voltage
See the individual hardware specifications document for the recommended resistor value. See the individual hardware specifications document for more information.
14
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
MOTOROLA
Freescale Semiconductor, Inc.
Revision History
1.3
Revision History
Table 5. Document Revision History
Revision Number 0, 0.1 1 Internal releases Initial public release Significant Changes
Table 5 shows this document's revision history.
Freescale Semiconductor, Inc...
15
Common Footprint for the MPC750, MPC755, MPC7400, and MPC7410 For More Information On This Product, Go to: www.freescale.com
MOTOROLA
Freescale Semiconductor, Inc.
HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217 1-303-675-2140 or 1-800-441-2447 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3-20-1, Minami-Azabu Minato-ku, Tokyo 106-8573 Japan 81-3-3440-3569 ASIA/PACIFIC:
Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.
Freescale Semiconductor, Inc...
Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre, 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong 852-26668334 TECHNICAL INFORMATION CENTER: 1-800-521-6274 HOME PAGE: http://www.motorola.com/semiconductors DOCUMENT COMMENTS: FAX (512) 933-2625, Attn: RISC Applications Engineering
Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. digital dna is a trademark of Motorola, Inc. All other product or service names are the property of their respective owners. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. (c) Motorola, Inc. 2001
AN1812/D
For More Information On This Product, Go to: www.freescale.com

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